Security Chip-CCM3305S_C*Core Technology Co.,Ltd.

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Product Overview
Functional Characteristics
Typical Application
Technical Support

Security Chip-CCM3305S

CCM3305S is designed based on the 32-bit security CPU CS0 with independent intellectual property rights. It is distinguished by low power consumption, high performance, multifunction and high security level. It integrates multiple encryption engine modules, and can be widely applied in mobile payment, secure memory, real-time data encryption and other fields. The chip’s typical operating frequency is 80MHz.

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Block diagram of CCM3305S

Package Type

Pin	Package type and pin assignment(mm)
Pin	QFN64（8*8）	QFN88（10*10）	TF card
USB2.0	1	1	0
USB3.0	1	1	0
SD	0	1	1
EMMC	1	1	0
I2C（Multiplexing）	1	1	0
UART（Multiplexing）	2	2	0
SSI（Multiplexing）	1（2wire）	1	0
SPI（Multiplexing）	1	2	0
7816（Multiplexing）	1	0	0
EPORT(Multiplexing)	30	42	0

Functional Characteristics

CPU Features

● 32-bit low-power RISC core with highly optimized 3-stage pipeline
● Supporting byte, half-word, and word memory access
● Supporting interrupt nesting
● Supporting single-cycle 32-bit x 32-bit hardware integer multiplier array, 3 to13 cycle hardware integer frequency divider array
● Memory protection unit (MPU)
● Low power consumption and high performance
● Supporting Cache
● Timing module EPT
On-Chip Memory Resources

● 256K bytes of SRAM
● 48K bytes of ROM
● 1M byte EFLASH, minimum 100,000 erase cycles
Internal Modules

● DMA/EDMA
● 2 timers (PIT)
● Watchdog (WDT)
● Time counter (TC)
● Real-time clock (RTC)
● Nested vectored interrupt controller (NVIC)
Security Features 1

● Asymmetric algorithms
- 1024bit RSA
- 2048bit RSA
- 256bit SM2 prime field
● Symmetric algorithms
- DES/3DES supports ECB/CBC mode
  - AES supports ECB/CBC/CFB/OFB/CTR/CCM/GCM/XTS mode
  - SM4 supports ECB/CBC/CFB/OFB/CTR/XTS mode
● Hashing algorithms
  - SM3
  - SHA-0/ SHA-1/ SHA-224/ SHA-256
● CRC
  - Supporting CRC32/ CRC16/ CRC8
  - Supporting DMAC operation
Security Features 2

● Memory protection mechanism
  - Application-oriented memory partitioning with hardware support for secure isolation
  - Scrambling bus
● True random number generator, compliant with FIPS 140-2 standards and national commercial cryptography standards
● Safety detection and protection unit
  - Voltage detection unit
  - Light detection unit
  - Power supply burr detection unit
  - Metal shielding protection
  - Temperature detection unit
  - Frequency detection unit
  - Clock and reset pulse filtering
  - Optimizing wire routing for security
Product Qualification

● Level II of security chip for commercial crypto product certification
● EAL5+ of China Cybersecurity Review Technology and Certification Center
Other Features

● Unique serial number for each product
● Main power input voltage: 1.62V~5.5V
● Built-in LDO power output
● Typical power consumption: 120uA/MHz
● Static power consumption: 0.3uA
● Supporting internal power-on reset and external reset